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# Registers | Shift Registers

Registers are defined as the set of flip flops to store more than one bit of memory in it, a register can be made by combining a set of suitable flip flops together such as 4 JK flip flops, 4 D flip flops, etc. They are used to accept, store and transfer data or instructions mainly in binary form (0,1), for performing an action with the help of clock pulse. They work in two types of shifts right shift (left to right transferring of data) and in left shift (right to left transferring of data).

#### There are basically six types of shift registers, they are:

1) SISO shift register (Serial In Serial Out register)

2) SIPO shift register (Serial In Parallel Out register)

3) PISO shift register (Parallel In Serial Out register)

4) PIPO shift register (Parallel In Parallel Out register)

5) Bidirectional shift register

6) Universal shift register

# 1. SISO shift register:-

In SISO or serial in serial out registers data is entered and received serially with the clock pulse. In SISO registers n clocks are required to enter a data (let 1110) and n-1 clocks required to receive the output (all data), so total n+n-1 =2n-1 clocks are required to process the data.

Logic diagram:-

Truth table:-

Truth table for entered data 1110, you can see that for 4 bits data 2×4-1 =7 clocks are required blow.

# 2. SIPO shift register:-

In SIPO or serial in parallel out registers data is entered in serially and received out parallelly. In SIPO n clocks are required for entering the data and no more clock are required for receiving it (data receive out instantly on parallel terminals), so total n+0 =n clocks are required to process data, they are more faster processing register then SISO shift registers.

Logic diagram:-

# 3. PISO shift register:-

In PISO or parallel in serial out registers data is entered in parallelly and received out serially. In PISO 1 clock is required for entering in all data and n-1 clocks are required to received out data, so total 1+n-1 =n clocks are required to process the data, they have same performance like in SIPO registers.

Logic diagram:-

# 4. PIPO shift register:-

In PIPO or parallel in parallel out registers data both entered in and received out parallelly. In PIPO only 1 clock is required for entering the data and no more clock are required for receiving it (data receive out instantly on other side parallel terminals), so total 1+0 =1 clock is required to process data. They are the fastest processing register ever in all 4 types of registers SISO, SIPO, PISO, PIPO.

Logic diagram:-

# 5. Bidirectional shift register:-

The all 4 registers SISO, SIPO, PISO, PIPO you studied above are only works in one direction or in one shift rather in right shift (left to right) or in left shift (right to left) but in bidirectional shift register data is shifted to both directions.

Logic diagram:-

Here XR represent right shift and XL represent left shift and any of one can work at a time.

When R/L̅ is 0 or low then circuit works on right shift and only gates G1, G3, G5, G7 are active.

When R/L̅ is 1 or high then circuit works on left shift and only gates G2, G4, G6, G8 are active.

# 6. Universal shift register:-

The universal shift register works in all possible four modes (SISO, SIPO, PISO, PIPO) and also as bidirectional shift register.

Logic diagram:-

Here Xi is serial input of this register, Xi0, Xi1,Xi2, Xi3 are the parallel inputs of this register, Yi is serial output of this register and Y0, Y1, Y2, Y3, are the parallel outputs of this register.

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